1. Technical Field
The present disclosure is related to a current-to-voltage converter, and in particular to, a single stage current-to-voltage converter with a high input range and a wide output swing, and the electronic apparatus using the current-to-voltage converter.
2. Description of Related Art
Currently, an electronic apparatus usually has a current-to-voltage converter, and the current-to-voltage converter can convert the current to the voltage, and transmit the converted voltage to the other function circuit of the electronic apparatus, such that the function circuit can receive the voltage, and execute a corresponding function according to the voltage.
Please refer to FIG. 1, FIG. 1 is circuit diagram of a conventional current-to-voltage converter. The conventional current-to-voltage converter 1 comprises a first current-to-voltage unit 11, a second current-to-voltage unit 12 and an output capacitor Cout, and has an input end at an end E and an output end at an end F. The first current-to-voltage unit 11 and the second current-to-voltage unit 12 are connected to each other through the ends E and F, and thus form a cascode structure. The output capacitor Cout is connected to an output end of the conventional current-to-voltage converter 1 through the end F.
The conventional current-to-voltage converter 1 can receive an input current through an input end thereof, generate the voltage Vout according to the current Iin, and output the voltage Vout through the output end thereof. To put it concretely, the first current-to-voltage unit 11 and the second current-to-voltage unit 12 determine currents flowing inner transistors thereof according to the current Iin, and the currents flowing the inner transistors thereof determine the drain-source voltages of the inner transistors of the first current-to-voltage unit 11 and the second current-to-voltage unit 12, such that the voltage Vout at the output end can be determined.
The first current-to-voltage unit 11 comprises four P-type transistors P1 through P4, an N-type transistor N1, and an operation amplifier OP1. Gates of the P-type transistors P1 and P2 are connected to each other, and further to a drain of the P-type transistor P3. Sources of P-type transistors P1 and P2 are connected to a supply voltage VDD. Through the end A, a positive input end of the operation amplifier OP1 is connected to a drain of the P-type transistor P1 and a source of the P-type transistor P3. Through the end B, a negative input end of the operation amplifier OP1 is connected to a drain of the P-type transistor P2 and a source of the P-type transistor P4. A gate of the P-type transistor P3 is connected to a bias bias1, and an output end of the operation amplifier OP1 is connected to a gate of the P-type transistor P4. A drain of the N-type transistor N1 is connected to a drain of the P-type transistor P3, a gate of the N-type transistor N1 is connected to another bias biasa. A source of the N-type transistor N1 and a drain of the P-type transistor P4 are respectively connected to the ends E and F.
The second current-to-voltage unit 12 comprises four N-type transistors N2 through N5, a P-type transistor P5, and an operation amplifier OP2. Gates of the N-type transistors N2 and N3 are connected to each other, and further to a drain of the N-type transistor N4. Sources of the N-type transistors N1 and N2 are connected to a ground. Through the end C, a positive input end of the operation amplifier OP2 is connected to a drain of the N-type transistor N2 and a source of the N-type transistor N4. Through the end D, a negative input end of the operation amplifier OP2 is connected to a drain of the N-type transistor N3 and a source of the N-type transistor N5. A gate of the N-type transistor N4 is connected a bias bias2, and an output end of the operation amplifier OP2 is connected to gate of the N-type transistor N5. A drain of the P-type transistor P5 is connected to a drain of the N-type transistor N4, and a gate of the P-type transistor P5 is connected to another bias biasb. A source of the P-type transistor P5 and a drain of the N-type transistor N5 are respectively connected to the ends E and F.
In the conventional current-to-voltage converter 1, the biases bias1 and bias2 are respectively used to determine swings of currents generated by the first current-to-voltage unit 11 and the second current-to-voltage unit 12, and the swings of the currents generated by the first current-to-voltage unit 11 and the second current-to-voltage unit 12 determines the swing of voltage Vout. Generally speaking, the bias bias1 and bias2 are fixed biases (i.e. constant voltage), such that when the current Iin is not input to the first current-to-voltage unit 11 and the second current-to-voltage unit 12, the fixed currents flowing the P-type transistors P2, P4, and the N-type transistors N5, N3 are generated. However, since the first current-to-voltage unit 11 and the second current-to-voltage unit 12 are connected in a cascode structure, the gate of N-type transistor N1 and the gate of the P-type transistor P5 should be connected to the biases biasa and biasb, and the input range of the current Iin is limited.
Additionally, the operation amplifier OP1 is used to clamp the voltage levels of the ends A and B at the constant voltage values, and in the similar manner, the operation amplifier OP2 is used to clamp the voltage levels of the ends C and D at the constant voltage values. Accordingly, the operation amplifiers OP1 and OP2 can enhance the output impedance of the output end of the conventional current-to-voltage converter 1, so as to reduce the effect which the leakage current affects the voltage Vout. However, the operation bandwidth of the operation amplifiers OP1 and OP2 may decrease the current tracking speeds of the currents flowing the P-type transistors P2, P4, and the N-type transistors N5, N3, such that the transient speed of the voltage Vout of the output end may be too slow to cause the current-to-voltage (Iin-to-Vout) conversion error, i.e. the rising or falling speed of the currents flowing the P-type transistors P2, P4, and the N-type transistors N5, N3 may be slow unexpectedly, and the rising or falling speed of the voltage Vout is not fast enough.